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13078: zEC12 Hardware: Processor, Memory and System Structure

Tuesday, February 5, 2013: 9:30 AM-10:30 AM
Grand Ballroom B, Grand Ballroom Level (San Francisco Hilton)
Speaker: Harv Emery(IBM Corporation)
  • zEC12 Hardware: Processor, Memory and System Structure (1.5 MB)
  • Come to this session for a "deep dive" technical introduction to the processor design, architectural enhancements, and overall system structure of the IBM zEnterprise EC12 (zEC12), IBM's most advanced System z Enterprise Class server, announced on August 28, 2012. Material presented will include considerable technical detail on zEC12 enhancements compared to z196 in the areas of the
    processor chip, additions to z/Architecture, the multi-chip module, cache hierarchy, processor book structure, memory offerings, cryptographic function, OnDemand offerings, and installation flexibility. A brief introduction to the zEC12 I/O infrastructure will also be included for completeness.

    Tracks: z/OS Systems Programming
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