Tuesday, August 13, 2013: 9:30 AM-10:30 AM
Room 302 (Hynes Convention Center)
Speaker:
Ray Wicks(IBM Corporation)
This session quickly covers the processor architecture and the role of the storage hierarchy in performance and capacity planning. This session provides an overview of the roles of the I-unit, E-unit, caching levels, and RAM. The emphasis is focused upon the movement of data and programs in the storage hierarchy versus the measure of performance. The measures seen are the cycles per instruction and the relative nest intensity. Question to be answered: How can two machines with the same memory size and cycle time perform with such different capacities?