Wednesday, August 10, 2011: 3:00 PM-4:00 PM
Oceanic 1 (Walt Disney World Dolphin )
Speaker:
Robert R. Rogers (IBM Corporation)
If you've ever been an assembler programmer, you'll enjoy this look inside IBM's latest mainframe processor. This presentation includes an overview of the processor cache, the elements of the instruction pipeline, and other aspects of instruction execution. It focuses on the IBM zEnterprise processors (z196) and is an update to presentations the speaker has given in the past on the workings of earlier IBM System z processors. This version of the presentation covers topics such as the high-frequency pipeline, instruction cracking, register renaming, out-of-order execution, co-processors, TLB enhancements and other interesting aspects of the z196 processors.